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Author SHA1 Message Date
Champlin, Saji 92bcb1e4b9 content update
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added index to hikmicro hacking part 1
worked on cleanup of yosys4gal
removed "post" tag from slide decks
2025-04-15 12:05:39 -05:00
Champlin, Saji 7613c08b84 add vocab 2025-04-15 12:05:26 -05:00
Champlin, Saji 67ff75ab69 fix gitignore paths 2025-04-15 11:52:39 -05:00
6 changed files with 41 additions and 13 deletions

12
.gitignore vendored
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@ -5,11 +5,11 @@ result
# Vale
./styles/*
!./styles/config/
/styles/*
!/styles/config/
./styles/config/*
!./styles/config/vocabularies/
/styles/config/*
!/styles/config/vocabularies/
./styles/config/vocabularies/*
!./styles/config/vocabularies/Base
/styles/config/vocabularies/*
!/styles/config/vocabularies/Base

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@ -4,6 +4,8 @@ MinAlertLevel = suggestion
Packages = write-good, proselint
Vocab = Base
[*.{md}]
# ^ This section applies to only Markdown files.
#

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@ -0,0 +1,9 @@
---
title: Hacking Hikmicro part 1
description: Reverse engineering the Hikmicro Pocket C to understand the image format
---
I recently picked up a Hikmicro Pocket C thermal imager, since
my old Seek Thermal was becoming too annoying to use. The Pocket
C is a standalone device with a much better sensor. It supports
radiometric images as well as radiometric video and USB radio.

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@ -6,10 +6,10 @@ date: 2024-06-14
## A history lesson
During the semiconductor revolution, a dilemma appeared: Designing new ICs
During the semiconductor revolution, a dilemma appeared: Designing new integrated circuits
required a lot of time and effort to create the mask, and iteration
expensive. Due to limited compute capability, ICs could not be complex designs.
tools/compute to do tasks like optimization or place-and-route were limited.
expensive. Due to limited tooling, ICs could not be complex designs.
Techniques and tools to do tasks like optimization or place-and-route did not exist or were primitive.
And what if you wanted a low-volume design? Programmable Logic Arrays (PLAs)
were an early approach to these problems. The idea was simple: create a
flexible logic architecture that could be modified later in the process to
@ -40,7 +40,7 @@ electronically-erasable, 22-pin programmable logic block, which had up to 10
outputs that are registered and used for feedback. These outputs can be tri-stated
to give greater flexibility.
![A figure shows the Output Logic Macrocell, or OLMC. The OLMC consists of a D Flip-Flop, feedback routing, and 4-to-1 mux to select behavior](gal_olmc.png)
![A figure shows the Output Logic Macro-cell, or OLMC. The OLMC consists of a D Flip-Flop, feedback routing, and 4-to-1 mux to select behavior](gal_olmc.png)
## Back To Today: GALs in the 21st Century
@ -63,7 +63,7 @@ GALs operate at 5 volts is useful when interfacing with older systems and
removes the need for a level shifter.
However, this isn't all great. Programming GALs is an exercise in frustration.
In practice, this isn't all great. Programming GALs is an exercise in frustration.
Take a look at a basic combinatorial assembly file:
```PALASM
@ -113,7 +113,7 @@ Not particularly.
Well, there is a niche use case. These parts are 5-volt tolerant, and
come in DIP packages. If you needed some basic glue logic when working on an
older 5 volt system, you might want to have a few of these and a programmer
instead of a collection of 74-series logic. At the very least, these chips can
instead of a collection of 74-series logic. These chips can
emulate any 74-series chip, and can reduce a multi-chip design to a single
chip. The DIP form factor makes it much easier to breadboard, and the chips
have zero start up delay.

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@ -1,6 +1,5 @@
export default {
tags: [
"posts"
],
"layout": "layouts/deck.njk",
};

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@ -0,0 +1,18 @@
Verilog
FPGAs?
Yosys
ICs?
PLAs?
toolchains?
testbench(es)?
bitstream
gateware
mux
# Terms for electronics
GALs?
BGA
DIP
SSOP
QF[PN]